Integrated circuits, for example, memories have different power requirements in different states. Examples of different states include but are not limited to a full power supply state and reduced power supply state. Examples of reduced power supply state include stand by mode or active mode at reduced power supply, and light sleep mode. FIG. 1a and FIG. 1b illustrate a traditional implementation of reduced power supply state. FIG. 1a includes a Positive-channel metal oxide semiconductor (PMOS) diode 102 and a PMOS transistor 104. When DS signal is LOW (0), a load 110 is in reduced power supply state. When DS signal is HIGH (1), load 110 is in shut down state. FIG. 1b includes a Negative-channel metal oxide semiconductor (NMOS) diode 106 and a NMOS transistor 108. When DS signal is LOW (0), load 110 is in reduced power supply state. When DS signal is HIGH (1), load 110 is in shut down state.
A traditional implementation of full power supply is also known as power gating implementation. FIG. 1c and FIG. 1d illustrate a traditional implementation of the power gating. FIG. 1c includes a PMOS transistor 112. When DS signal is LOW (0), load 110 is in full power supply state. When DS signal is HIGH (1), load 110 is in shut down state. FIG. 1d includes a NMOS transistor 114. When DS signal is LOW (0), load 110 is in full power supply state. When DS signal is HIGH (1), load 110 is in shut down state.
Over a period of time, a need has arose for implementing a single circuit for both full power supply state and reduced power supply state. FIG. 2a and FIG. 2b illustrate a combined circuit 200a and a combined circuit 200b for both full power supply state and reduced power supply state in accordance with a prior art. Combined circuit 200a includes PMOS diode 102, PMOS transistor 104 and PMOS transistor 112. Combined circuit 200b includes NMOS diode 106, NMOS transistor 108 and NMOS transistor 114. A table below illustrates the working of combined circuit 200a and combined circuit 200b.
TABLE 1DSLSFunction00Full Power Supply01Reduced Power Supply10Shut Down State11Reduced Power Supply
However, circuit 200a and circuit 200b leads to area inefficiency. PMOS diode 102, PMOS transistor 104, NMOS diode 106 and NMOS transistor 108 used are of large size which consumes area of a chip. Further, gate leakage and junction leakage is also high due to large size of PMOS diode 102, PMOS transistor 104, NMOS diode 106 and NMOS transistor 108.
In light of the foregoing discussion, there is a need of an area efficient implementation for power supply regulation.